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₹52.93 (Including tax)
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Quantity | Discount | Price |
---|---|---|
5 - 10 | 5% | ₹50.27 (Including tax) |
11 - 20 | 8% | ₹48.68 (Including tax) |
21 - 40 | 10% | ₹47.63 (Including tax) |
41 - 100 | 12% | ₹46.57 (Including tax) |
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The 74HC107D is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Note: for more technical details go through Datasheet in the attachment sectionÂ
1 x 74HC107D
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